As the integrated circuits (IC) technology constantly advances, the characteristic dimension of the IC device becomes small. Correspondingly, the circuit debug and defect detection also become increasingly challenging. The electrical testing is a very important approach to detect the process issues and defects in the design or manufacturing of an integrated circuit.
It is typical in an electrical test to use a probe to probe and measure a standard pad in an integrated circuit in order to acquire electrical parameters and to test the function of the integrated circuit or make a failure analysis on the failing integrated circuit by analyzing the electrical data. However, the probe used in the standard pad is significantly larger in size than a metal line in an internal circuit portion in the integrated circuit, so such a test method generally can acquire only overall electrical parameters of the integrated circuit but is difficult to test some circuit portions in the integrated circuit.
At present, a nano probing, an emerging advanced failure analysis technique has been developed for circuit debug and electrical characterization of the special parts/segments in the IC, e.g., a metal line, an MOS transistor, a specific functional module, etc. Due to nano probing with the small size typically ranging from 50 nm to 100 nm, it can theoretically be used to measure electrical characteristics of structures in the IC. Now various nano-probes for the test have emerged based upon nano probing. For example, a nano-probe and a method for manufacturing the same has been disclosed in Patent Publication WO2007077842A1, and also a nano-probe card and a method for manufacturing the same have been disclosed in Patent Publication US20090121734A1.
However, the efficiency is very low when applying the nano-probe in the current structures accurately with the aid of a Scanning Electron Microscope (SEM), due to the small size of the probe.
Further referring to FIG. 1, standard pads 100 are typically connected only to an input and an output of a metal line, so it is neither possible to apply the probe on the interested segment delimited by the metal line in the shape of, for example, multiple fingers to probe and measure the interested segment, nor possible to perform automatic probing and measuring, which may further degrade the efficiency of the test.
Referring to FIG. 2, a test of an across-layer metal line is required, for example, in an electro migration test, and since the standard pads 100 are typically connected only to a metal line at the present layer, a failure occurring with a via 300 between an overlying metal line 200 and an underlying metal line 400 can not be detected with the existing probing and measuring method.
Moreover, current technologies for manufacturing IC have developed up to technology in 65 nm, so a metal line in a circuit portion in the IC is also approximate in size to the probe pin used in nano probing. Thus, there arises both a significant increase of difficulty for positioning the probe on a test portion in the test and a risk of damaging the metal line during the detection, which may be disadvantageous to acquire an accurate result of the test.